#objdump: -dr --prefix-addresses
#name: MIPS VR5400
#as: -march=vr5400

.*: +file format .*mips.*

Disassembly of section \.text:
0+0000 <stuff> mul	a0,a1,a2
0+0004 <stuff\+0x4> mulu	a0,a1,a2
0+0008 <stuff\+0x8> mulhi	a0,a1,a2
0+000c <stuff\+0xc> mulhiu	a0,a1,a2
0+0010 <stuff\+0x10> muls	a0,a1,a2
0+0014 <stuff\+0x14> mulsu	a0,a1,a2
0+0018 <stuff\+0x18> mulshi	a0,a1,a2
0+001c <stuff\+0x1c> mulshiu	a0,a1,a2
0+0020 <stuff\+0x20> macc	a0,a1,a2
0+0024 <stuff\+0x24> maccu	a0,a1,a2
0+0028 <stuff\+0x28> macchi	a0,a1,a2
0+002c <stuff\+0x2c> macchiu	a0,a1,a2
0+0030 <stuff\+0x30> msac	a0,a1,a2
0+0034 <stuff\+0x34> msacu	a0,a1,a2
0+0038 <stuff\+0x38> msachi	a0,a1,a2
0+003c <stuff\+0x3c> msachiu	a0,a1,a2
0+0040 <stuff\+0x40> ror	a0,a1,0x19
0+0044 <stuff\+0x44> rorv	a0,a1,a2
0+0048 <stuff\+0x48> dror	a0,a1,0x19
0+004c <stuff\+0x4c> dror32	a0,a1,0x19
0+0050 <stuff\+0x50> dror32	a0,a1,0x19
0+0054 <stuff\+0x54> drorv	a0,a1,a2
0+0058 <stuff\+0x58> dbreak
0+005c <stuff\+0x5c> dret
0+0060 <stuff\+0x60> mfdr	v1,\$3
0+0064 <stuff\+0x64> mtdr	v1,\$3
0+0068 <stuff\+0x68> mfpc	a0,1
0+006c <stuff\+0x6c> mfps	a0,1
0+0070 <stuff\+0x70> mtpc	a0,1
0+0074 <stuff\+0x74> mtps	a0,1
0+0078 <stuff\+0x78> add\.ob	\$f0,\$f2,\$f4
0+007c <stuff\+0x7c> add\.ob	\$f2,\$f4,\$f6\[2\]
0+0080 <stuff\+0x80> add\.ob	\$f6,\$f4,0xf
0+0084 <stuff\+0x84> add\.ob	\$f4,\$f6,0x1f
0+0088 <stuff\+0x88> and\.ob	\$f0,\$f2,\$f4
0+008c <stuff\+0x8c> and\.ob	\$f2,\$f4,\$f6\[2\]
0+0090 <stuff\+0x90> and\.ob	\$f6,\$f4,0xf
0+0094 <stuff\+0x94> and\.ob	\$f4,\$f6,0x1f
0+0098 <stuff\+0x98> c\.eq\.ob	\$f0,\$f2
0+009c <stuff\+0x9c> c\.eq\.ob	\$f4,\$f6\[2\]
0+00a0 <stuff\+0xa0> c\.eq\.ob	\$f6,0xf
0+00a4 <stuff\+0xa4> c\.eq\.ob	\$f4,0x1f
0+00a8 <stuff\+0xa8> c\.le\.ob	\$f0,\$f2
0+00ac <stuff\+0xac> c\.le\.ob	\$f4,\$f6\[2\]
0+00b0 <stuff\+0xb0> c\.le\.ob	\$f6,0xf
0+00b4 <stuff\+0xb4> c\.le\.ob	\$f4,0x1f
0+00b8 <stuff\+0xb8> c\.lt\.ob	\$f0,\$f2
0+00bc <stuff\+0xbc> c\.lt\.ob	\$f4,\$f6\[2\]
0+00c0 <stuff\+0xc0> c\.lt\.ob	\$f6,0xf
0+00c4 <stuff\+0xc4> c\.lt\.ob	\$f4,0x1f
0+00c8 <stuff\+0xc8> max\.ob	\$f0,\$f2,\$f4
0+00cc <stuff\+0xcc> max\.ob	\$f2,\$f4,\$f6\[2\]
0+00d0 <stuff\+0xd0> max\.ob	\$f6,\$f4,0xf
0+00d4 <stuff\+0xd4> max\.ob	\$f4,\$f6,0x1f
0+00d8 <stuff\+0xd8> min\.ob	\$f0,\$f2,\$f4
0+00dc <stuff\+0xdc> min\.ob	\$f2,\$f4,\$f6\[2\]
0+00e0 <stuff\+0xe0> min\.ob	\$f6,\$f4,0xf
0+00e4 <stuff\+0xe4> min\.ob	\$f4,\$f6,0x1f
0+00e8 <stuff\+0xe8> mul\.ob	\$f0,\$f2,\$f4
0+00ec <stuff\+0xec> mul\.ob	\$f2,\$f4,\$f6\[2\]
0+00f0 <stuff\+0xf0> mul\.ob	\$f6,\$f4,0xf
0+00f4 <stuff\+0xf4> mul\.ob	\$f4,\$f6,0x1f
0+00f8 <stuff\+0xf8> mula\.ob	\$f0,\$f2
0+00fc <stuff\+0xfc> mula\.ob	\$f4,\$f6\[2\]
0+0100 <stuff\+0x100> mula\.ob	\$f6,0xf
0+0104 <stuff\+0x104> mula\.ob	\$f4,0x1f
0+0108 <stuff\+0x108> mull\.ob	\$f0,\$f2
0+010c <stuff\+0x10c> mull\.ob	\$f4,\$f6\[2\]
0+0110 <stuff\+0x110> mull\.ob	\$f6,0xf
0+0114 <stuff\+0x114> mull\.ob	\$f4,0x1f
0+0118 <stuff\+0x118> muls\.ob	\$f0,\$f2
0+011c <stuff\+0x11c> muls\.ob	\$f4,\$f6\[2\]
0+0120 <stuff\+0x120> muls\.ob	\$f6,0xf
0+0124 <stuff\+0x124> muls\.ob	\$f4,0x1f
0+0128 <stuff\+0x128> mulsl\.ob	\$f0,\$f2
0+012c <stuff\+0x12c> mulsl\.ob	\$f4,\$f6\[2\]
0+0130 <stuff\+0x130> mulsl\.ob	\$f6,0xf
0+0134 <stuff\+0x134> mulsl\.ob	\$f4,0x1f
0+0138 <stuff\+0x138> nor\.ob	\$f0,\$f2,\$f4
0+013c <stuff\+0x13c> nor\.ob	\$f2,\$f4,\$f6\[2\]
0+0140 <stuff\+0x140> nor\.ob	\$f6,\$f4,0xf
0+0144 <stuff\+0x144> nor\.ob	\$f4,\$f6,0x1f
0+0148 <stuff\+0x148> or\.ob	\$f0,\$f2,\$f4
0+014c <stuff\+0x14c> or\.ob	\$f2,\$f4,\$f6\[2\]
0+0150 <stuff\+0x150> or\.ob	\$f6,\$f4,0xf
0+0154 <stuff\+0x154> or\.ob	\$f4,\$f6,0x1f
0+0158 <stuff\+0x158> pickf\.ob	\$f0,\$f2,\$f4
0+015c <stuff\+0x15c> pickf\.ob	\$f2,\$f4,\$f6\[2\]
0+0160 <stuff\+0x160> pickf\.ob	\$f6,\$f4,0xf
0+0164 <stuff\+0x164> pickf\.ob	\$f4,\$f6,0x1f
0+0168 <stuff\+0x168> pickt\.ob	\$f0,\$f2,\$f4
0+016c <stuff\+0x16c> pickt\.ob	\$f2,\$f4,\$f6\[2\]
0+0170 <stuff\+0x170> pickt\.ob	\$f6,\$f4,0xf
0+0174 <stuff\+0x174> pickt\.ob	\$f4,\$f6,0x1f
0+0178 <stuff\+0x178> sub\.ob	\$f0,\$f2,\$f4
0+017c <stuff\+0x17c> sub\.ob	\$f2,\$f4,\$f6\[2\]
0+0180 <stuff\+0x180> sub\.ob	\$f6,\$f4,0xf
0+0184 <stuff\+0x184> sub\.ob	\$f4,\$f6,0x1f
0+0188 <stuff\+0x188> xor\.ob	\$f0,\$f2,\$f4
0+018c <stuff\+0x18c> xor\.ob	\$f2,\$f4,\$f6\[2\]
0+0190 <stuff\+0x190> xor\.ob	\$f6,\$f4,0xf
0+0194 <stuff\+0x194> xor\.ob	\$f4,\$f6,0x1f
0+0198 <stuff\+0x198> alni\.ob	\$f0,\$f2,\$f4,5
0+019c <stuff\+0x19c> shfl\.mixh\.ob	\$f0,\$f2,\$f4
0+01a0 <stuff\+0x1a0> shfl\.mixl\.ob	\$f0,\$f2,\$f4
0+01a4 <stuff\+0x1a4> shfl\.pach\.ob	\$f0,\$f2,\$f4
0+01a8 <stuff\+0x1a8> shfl\.pacl\.ob	\$f0,\$f2,\$f4
0+01ac <stuff\+0x1ac> sll\.ob	\$f2,\$f4,\$f6\[3\]
0+01b0 <stuff\+0x1b0> sll\.ob	\$f4,\$f6,0xe
0+01b4 <stuff\+0x1b4> srl\.ob	\$f2,\$f4,\$f6\[3\]
0+01b8 <stuff\+0x1b8> srl\.ob	\$f4,\$f6,0xe
0+01bc <stuff\+0x1bc> rzu\.ob	\$f2,0xd
0+01c0 <stuff\+0x1c0> rach\.ob	\$f2
0+01c4 <stuff\+0x1c4> racl\.ob	\$f2
0+01c8 <stuff\+0x1c8> racm\.ob	\$f2
0+01cc <stuff\+0x1cc> wach\.ob	\$f2
0+01d0 <stuff\+0x1d0> wacl\.ob	\$f2,\$f4
0+01d4 <stuff\+0x1d4> rorv	a0,a1,a2
0+01d8 <stuff\+0x1d8> ror	a0,a1,0x11
0+01dc <stuff\+0x1dc> drorv	a0,a1,a2
0+01e0 <stuff\+0x1e0> dror32	a0,a1,0x1
0+01e4 <stuff\+0x1e4> dror	a0,a1,0x2
	\.\.\.
